This is a list of AMD64 Generic Performance Event types. Please see BIOS and Kernel Developer's Guide for AMD Processors.
Name | Description | Counters usable | Unit mask options |
DATA_CACHE_ACCESSES | Data Cache Accesses | all | |
DATA_CACHE_MISSES | Data Cache Misses | all |
0x01: First data cache miss or streaming store to a 64B cache line
0x02: First streaming store to a 64B cache line |
DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE | Data Cache Refills from L2 or System | all |
0x01: Fill with good data. (Final valid status is valid)
0x02: Early valid status turned out to be invalid 0x08: Fill with read data error |
DATA_CACHE_REFILLS_FROM_NORTHBRIDGE | Data Cache Refills from System | all | |
CPU_CLK_UNHALTED | CPU Clocks not Halted | all | |
INSTRUCTION_CACHE_FETCHES | Instruction Cache Fetches | all | |
INSTRUCTION_CACHE_MISSES | Instruction Cache Misses | all | |
INSTRUCTION_CACHE_REFILLS_FROM_L2 | Instruction Cache Refills from L2 | all | |
INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM | Instruction Cache Refills from System | all | |
RETIRED_INSTRUCTIONS | Retired Instructions | all | |
RETIRED_UOPS | Retired uops | all | |
RETIRED_BRANCH_INSTRUCTIONS | Retired Branch Instructions | all | |
RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS | Retired Mispredicted Branch Instructions | all | |
RETIRED_TAKEN_BRANCH_INSTRUCTIONS | Retired Taken Branch Instructions | all | |
RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED | Retired Taken Branch Instructions Mispredicted | all | |
RETIRED_INDIRECT_BRANCHES_MISPREDICTED | Retired Indirect Branches Mispredicted | all |
More computing sins are committed in the name of efficiency (without necessarily achieving it) than for any other single reason - including blind stupidity.- W. A. Wulf